Don’t Miss the 30th DVCon U.S. 2018 Next Week!

LOUISVILLE, Colo., Feb. 20, 2018 -- The 2018 Design and Verification Conference and Exhibition U.S. (DVCon U.S.) begins next week, offering attendees the industry’s most comprehensive technical program focused on the design and verification of electronics systems. Sponsored by Accellera Systems Initiative, the 30^th DVCon U.S. will be held February 26-March 1 at the DoubleTree Hotel in San Jose, California.

Attendees can choose from a broad selection of 39 papers, 8 tutorials, 4 short workshops and approximately 31 poster sessions over the course of the 4-day technical conference and exhibition.

The conference opens with Accellera Day on Monday, February 26. There will be a morning tutorial, “Portable Test and Stimulus: The Next Level of Verification Productivity is Here,” followed by an Accellera-sponsored luncheon that will provide Accellera updates, honor the 2018 Technical Excellence Award recipient, and have a panel of Accellera Working Group Chairs providing updates on their working group activities and answering questions from the audience.  The afternoon tutorial, “IEEE-Compatible UVM Reference Implementation and Verification Components,” will address the new reference implementation and describe the new features and changes relative to UVM 1.2 and what they mean in real applications.

The keynote, “Industry’s Next Challenge: The Petacycle Challenge,” will be delivered by Christopher Tice, vice president of Verification Continuum Solutions in the Verification Group at Synopsys on Tuesday, February 27. He will address how new growth segments in the industry, such as Automotive, IoT, Networking, and 5G Mobile among others, are fundamentally changing the requirements for verification. 

There will also be two panel discussions on Wednesday, March 2: “Help! System Coverage is a Big Data Problem!” will have a panel of industry experts discuss some of the issues surrounding system coverage and some possible solutions; and “The Right Tool (or Tools) for the Toughest Verification Tasks” is comprised of users who will discuss how decisions are made about which tools are implemented in a design verification flow.

New to DVCon U.S. this year are four 90-minute short workshops on Thursday, March 1.  The workshops were developed to give smaller companies more opportunities to participate in the program.  There will also be six half-day tutorials on Thursday, including afternoon tutorials focused primarily on issues surrounding automotive safety and compliance. 

The DVCon Expo will be open for three afternoons:  Monday, February 26 from 5:00-7:00pm and Tuesday, February 27 and Wednesday, February 28 from 2:30-6:00pm.  There will be a reception each evening during the Expo.

To listen to some of the highlights from DVCon U.S. 2018 General Chair Dennis Brophy, his recent interview with Amelia Dalton for EE Journal’s Fish Fry can be found here.  

For the complete DVCon U.S. 2018 schedule visit www.dvcon.org.  To register, visit here. 

DVCon is the premier conference for discussion of the functional design and verification of electronic systems. DVCon is sponsored by Accellera Systems Initiative, an independent, not-for-profit organization dedicated to creating design and verification standards required by systems, semiconductor, intellectual property (IP) and electronic design automation (EDA) companies. In response to global interest, in addition to DVCon U.S., Accellera also sponsors events in China, Europe and India. For more information about Accellera, please visit www.accellera.org. For more information about DVCon U.S., please visit www.dvcon.org. Follow DVCon on Facebook https://www.facebook.com/DvCon or @dvcon_us on Twitter or to comment, please use #dvcon_us.

For more information, please contact:
Nannette Jordan
MP Associates, Inc.
303-530-4562
[email protected]

Barbara Benjamin
HighPointe Communications
503-209-2323
[email protected]