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Huawei's Kirin PC Chips: Bold Move to Adopt Unified Architecture, Rivaling Apple's M-Series

Huawei challenges Apple's M-Series with new Kirin PC chip. Credit: Amanz/Unsplash

Huawei's bold move to adopt a unified architecture for its Kirin PC chips could challenge Apple's M-Series, integrating SoC and DRAM for unmatched performance.

Unified Memory Architecture Explained

With the integration of the system on chip (SoC) and dynamic random access memory (DRAM) into a single package, rumors suggest that Huawei will use this architecture in its Kirin PC chip. We have covered the benefits of this adjustment below, so keep reading to discover out.

Various components of a conventional CPU package are soldered to various parts of the motherboard. The system on a chip (SoC) and dynamic random access memory (DRAM) are integrated into one die in a unified memory architecture, which greatly improves the speed of communication between the two components.

Benefits of Closer Integration

Data transfer times and power consumption are both affected by the proximity of DRAM chips to the central processing unit and graphics processing unit.

The first Kirin PC chip from Huawei will introduce itself to remove this bottleneck, according to a rumor posted on X by @jasonwill101.

The proximity of the DRAM to the SoC in a unified memory architecture also provides high bandwidth to the chipset, which is an additional perk of this design.

This will enable the Central Processing Unit, Graphics Processing Unit, and Neural Processing Unit to swiftly access large data sets. Machines equipped with these chips may also never experience a memory leak while doing operations that necessitate coordinated processing by the CPU and GPU, thanks to this method.

There is no physical means to upgrade the DRAM chips since they are baked onto the packaging, which is the major downside.

Rivaling Apple’s M-Series Performance

Rumor has it that Huawei's first Kirin PC chip will have remarkable first performance claims, nearly matching Apple's M3 in multi-core capabilities. However, it doesn't say how many memory tiers the chip would have.

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